53 Search Results

Understanding mechanisms influencing electrical transport in material systems not only provides a scientific explanation for observed behavior but also offers insight into ways to enhance transport in devices. This study reports experimental hole mobility of 8 x 10⁴ cm² V^-1 s^-1 in a Ge_0.92Sn_0.08, the highest recorded mobility for the GeSn system. A study of the material's quality is presented using structural and electrical characterization techniques, with transport data being supported by simulations using an extensive modeling framework. Quantum Hall measurements further indicate the material's high quality and potential spintronic applications, with extracted values of 0.0689$$m$$₀ and 13.6 for themore » effective mass and effective g‐factor, respectively. It is observed that transport is limited by alloy disorder scattering at cryogenic temperatures. A comparative study between the presented structure and similar quantum well heterostructures revealed that the difference in hole mobilities is captured by a disparity in the reduced nominal alloy disorder scattering potential (Δ U_alloy = 0.8 eV), that is lower than the value of a fully random alloy (Δ U_alloy = 1.4–1.7 eV) potential. The difference in Δ U_alloy suggests that heterostructures with similar geometries and alloy compositions can have different alloy disorder scattering, implying that an underlying mechanism, such as short‐range order, may be responsible and warrants further investigation.« less

Transition metal dichalcogenides (TMDs) represent an emerging class of layered materials with applications in microelectronics, optoelectronics, photonics, and catalysis. The confinement of charge carriers within the highly anisotropic, quasi-two-dimensional geometry of one-layer (1L) TMDs leads to reduced, variable dielectric screening, giving rise to a quasiparticle band gap that is highly susceptible to the surrounding dielectric environment. Here, exploiting the contrasting external dielectric environments of gold-supported and suspended 1L W⁢S₂, we show how the electronic states of W⁢S₂ under the effective and ineffective screening environments align at a junction made within the same sheet of material. Photoelectron spectra point to themore » close alignment of the charge neutrality levels of W⁢S₂ in both environments, and the breakdown of rigid shifts between the valence states and core levels with the core levels shifting more than twice as much as the valence states. Furthermore, the effectively screened W⁢S₂ exhibits a valence state with the photoemission linewidth twice as large as the ineffectively screened suspended W⁢S₂, presumably originated from the locally varying W⁢S₂-Au distance and substrate disorders. Collectively, these findings provide key insights into the electronic behavior of W⁢S₂ and its photoemission process with the electronic states renormalized according to the external screening environments.« less

Vanadium dioxide (VO₂) is of interest for adaptive electronic applications such as neuromorphic neuristor devices and variable emissivity or tunable thermal control materials, thanks to its key property—a metal–insulator transition (MIT) at 68 °C that is accompanied by a dramatic change in electrical and optical properties. To improve performance in these roles, it is critical to develop approaches to engineer transport properties and the MIT behavior. While many documented techniques exist to modulate the MIT and film resistivities via lattice strain and chemical doping, less is known about the effects of ion irradiation on the intrinsic properties of VO₂, despitemore » the ability to control the spatial distribution of irradiation beams and the prevalence of high energy ion implantation in the semiconductor industry. The impact of irradiation of different acceleration energies on the responses of VO₂ is of specific interest, as charged particle energy generally impacts both the resulting defect profile and corresponding transport behavior. Here, we demonstrate that 2 MeV He ions at equivalent calculated displacements per atom, in two different types of films, can create remarkable changes to the nature of charge transport in VO₂, especially in the low-temperature insulating phase. Simulation of resulting changes in electrical conductivity reveals that He ion irradiation offers a strategy to increase both oscillation frequency and the signal transmission. These results provide insights into the intentional design of defect populations to modulate transport for neuromorphic VO₂ devices.« less

Negative differential resistance (NDR), where the device current decreases with increasing bias voltage, is a representative phenomenon where quantum mechanics induces counterintuitive physical behavior and offers promising applications such as high-frequency oscillators, amplifiers, and multilevel logic circuits. While the NDR behavior has been extensively studied in various materials and devices, the role of surface properties in NDR, particularly in InAs-based diodes, remains underexplored. In this work, we report the observation of NDR in vertically structured InAs p⁺n diodes that exhibit a peak-valley current ratio of ∼6, which is suitably high for applications. Circumference-normalized current–voltage characterization revealed that the NDR originatesmore » from band-to-band tunneling between the valence band of p⁺-InAs and the conduction band of an n⁺-InAs surface, where the n⁺ surface is due to surface states on otherwise n⁻-InAs. In addition, by comparing devices with various surface passivation methods (without intentional passivation, benzocyclobutene polymer, and silicon nitride), we found that the surface termination significantly affects the NDR characteristics. We present an equivalent circuit model to explain the observed device behavior. These findings offer insights into surface-enabled NDR phenomena and present new knobs for engineering NDR devices.« less

The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec⁻¹ subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I_ON) and a broad SSmore » operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I_ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.« less

GeSn is an emerging material with potential applications in next‐generation integrated optoelectronics and quantum information processing. While GeSn/SiGeSn quantum wells exhibit promising optical properties, their electrical transport characteristics and governing electrostatics in gated structures remain unexplored. Heterostructure field‐effect transistors are fabricated using GeSn/SiGeSn quantum wells and electronic transport properties of 2D holes are characterized. At 2 K, heterostructure field‐effect transistors with well/barrier compositions of Ge_0.945Sn_0.055/Si_0.03Ge_0.93Sn_0.04 and Ge_0.9Sn_0.1/Si_0.017Ge_0.927Sn_0.056, show peak mobilities of 9000 and 19 000 cm²/Vs, respectively, the latter setting a record for the highest mobility reported for GeSn quantum wells with a Sn concentration around 6 % or greater.more » Remarkably, at low carrier densities, devices with a SiGeSn barrier exhibit mobilities several times higher than previously reported for GeSn quantum wells with a Ge barrier. This higher mobility contrasts with the expectation that alloy scattering from the barrier would reduce carrier mobility. Two mechanisms based on atom probe tomography data analyses are proposed: i) unintentionally improved SiGeSn/GeSn interface and/or ii) reduced alloy scattering from short‐range order. Significant current–voltage hysteresis is observed, with the effective threshold gate voltage shifting by more than 5 V, attributed to non‐equilibrium trapped charge at various interfaces within the SiGeSn heterostructure.« less

Programmable memory components that operate optimally at cryogenic temperatures are essential for cryogenic computing architectures that seek to implement computing-in-memory. In this work, we demonstrate highly programmable memory in a Ge/GeSi heterostructure field-effect transistor (HFET). To operate, the HFET is gated to introduce positive carriers within the Ge quantum well, creating a high-conductance state. We show that this device can be set to a low-conductance state by sweeping a negative bias on the device drain, and reset it to its high-conductance state by sweeping a more positive bias on the device gate, thereby creating memory. We then determine that themore » device can be programmed within a 103 range of conductances using either the SET or the RESET operation. We propose that memory is achieved through charge trapping as carriers tunnel out of the quantum well, and that altering the density and spatial distribution of carriers modulates the device conductance. This mechanism exhibits endurance over 1000 cycles at temperatures ≤ 25 K, suggesting that the carrier traps are located at the oxide-semiconductor interface. As a first demonstration of programmable conductance in a Ge/GeSi HFET, this work highlights the potential of group-IV HFETs to perform as analog cryogenic memory components.« less

Dynamically manipulating carriers in van der Waals heterostructures could enable solid-state quantum simulators with tunable lattice parameters. A key requirement is the formation of deep potential wells to reliably trap excitations. Here, we report the observation of nonlinear acoustoelectric transport and dynamic carrier modulation in boron nitride-encapsulated graphene devices coupled to intense surface acoustic waves (SAWs) on LiNbO₃ substrates. SAWs generate strong acoustoelectric current densities (J_AE), transitioning from linear to nonlinear regimes with increasing SAW intensity. In the nonlinear regime, periodic carrier (electrons, holes, or their mixtures) stripes emerge. Using counter-propagating SAWs, we create standing SAWs (SSAWs) to dynamically manipulatemore » charge distributions without static gates. The saturation of J_AE, attenuation transitions, and tunable resistance peaks confirms strong carrier localization. Finally, these results establish SAWs as a powerful tool for controlling carrier dynamics in two-dimensional (2D) materials, paving the way for the development of time-dependent quantum systems and acoustic lattices for quantum simulation.« less

Atomic precision advanced manufacturing (APAM) dopes silicon with enough carriers to change its electronic structure and can be used to create novel devices by defining metallic regions whose boundaries have single-atom abruptness. Incompatibility with the thermal and lithography process requirements for gated silicon transistor manufacturing have inhibited exploration of both how APAM can enhance CMOS performance and how transistor manufacturing steps can accelerate the discovery of new APAM device concepts. In this work, we introduce an APAM process that enables direct integration into the middle of a transistor manufacturing workflow. We show that a process that combines sputtering and annealingmore » with a hardmask preserves a defining characteristic of APAM, a doping density far in excess of the solid solubility limit, while trading another, the atomic precision, for compatibility with manufacturing. The electrical characteristics of a chip combining a transistor with an APAM resistor show that the APAM module has only affected the transistor through the addition of a resistance and not by altering the transistor. This proof-of-concept demonstration also outlines the requirements and limitations of a unified APAM tool, which could be introduced into manufacturing environments, greatly expanding access to this technology and inspiring a new generation of devices with it.« less

Microelectronics are the cornerstone of the modern world, enhancing our daily lives by providing services such as communications and datacenters. These resources are accessible thanks to the continual pursuit of a deeper understanding of the chemical and physical phenomena underlying the materials synthesis approaches and fabrication processes used to create microelectronic components and subsequently the components' responses to electrical, optical, and other stimuli that are utilized within microelectronic systems. Today, further development of microelectronics requires multidisciplinary expertise across scientific disciplines and fields of study—synthesis, materials characterization, nanoscale fabrication, and performance characterization—with focus placed on comprehending the nanoscale forms and featuresmore » of microelectronic components. The Nanoscale Science Research Centers (NSRCs) are Department of Energy, Office of Science user facilities that support the international scientific community in advancing nanoscale science and technology. As a key component of the U.S. Government's National Nanotechnology Initiative, the NSRCs enable transformative discoveries by providing world-class facilities, expertise, and collaborative opportunities. Here, in this perspective, we showcase a non-exhaustive cross-section of the capabilities housed at and developed by the NSRCs and their user communities to address fundamental synthesis, metrology, fabrication, and performance considerations toward advancing the development of new microelectronics. Finally, we provide a timely outlook on the next major areas of necessary development in nanoscale sciences to continue the innovation of microelectronics into the next generation.« less